Du Lijun, president of chip equipment maker Shenzhen SiCarrier Industry Machines, said China faces export controls on access to lithography systems to make chips, but homemade tools could be employed instead to help it make 5-nanometer chips.

"There might be a path where we can use non-optical technologies, that is, using our process equipment to solve some of the lithography issues," Du said on the sidelines of the annual Semicon China industry fair that began on Wednesday.

Making its debut at the fair, SiCarrier presented a raft of etching and deposition process equipment and optical metrology and inspection tools at a booth that was one of the most crowded at the event, which drew about 1,400 exhibitors this year.

Du cautioned that multi-patterning could pose challenges to yields, as such techniques can increase the number of manufacturing steps by about 20% for the advance to the 5-nm process from 7-nm.

SiCarrier's tools are already used by major Chinese foundries such as the leading Semiconductor Manufacturing International Corporation (SMIC), said a company manager, who spoke on condition of anonymity.

SMIC did not immediately respond to a request for comment on Thursday.

SiCarrier also collaborates with telecoms giant Huawei, Bloomberg News said.

SiCarrier Industry Machines was founded in 2022 and its parent SiCarrier Technology, founded in 2021, is fully owned by a state-backed investment fund in the southern tech hub of Shenzhen, China’s corporate record website Qichacha shows.

It was among 140 Chinese tool firms added to a U.S. commerce trade blacklist last December. 

Multi-pattering, which replaces optical lithography with various etching and deposition steps, is widely seen as a way to help China produce advanced 5nm chips as it is denied access to advanced extreme ultraviolet (EUV) lithography tools made by ASML.

SiCarrier received a patent for multi-patterning technology in late 2023 from China’s intellectual property regulator. 

Its patent uses deep ultraviolet lithography (DUV) chipmaking machines and the self-aligned quadruple patterning technology to achieve certain technical thresholds seen on 5 nm chips, its filing showed.

That helps avoid use of EUV machines and cuts manufacturing cost, it said.

(This story has been refiled to fix the spelling of ‘domestically' in paragraph 1)

(Reporting by Che Pan, and Brenda Goh, Casey Hall; Editing by Miyoung Kim and Clarence Fernandez)